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UC Components - FPGA

• Xilinx Virtex XCV400-4BG560C

• 10,800 logic cells, 40x60 CLB array

• 404 user I/O pins with 4 global clocks

• SelectIO IO interface-supports multiple IO standards-3.3V, 5V, PCI, AGP with and without pull-ups and pull-downs

• SelectMap Programming & debugging port

• SelectLink communications channel

• SelectRAM Dual-Port ram implementation

• Package: 560-ball 42x42mm BGA